InterviewStack.io LogoInterviewStack.io

Concurrency and Synchronization Questions

Covers the principles and practical techniques for safely coordinating concurrent execution and access to shared resources. Topics include models of concurrency such as threads, processes, interrupt handlers, and tasks in a real time operating system; differences between preemptive and cooperative scheduling; shared data hazards including race conditions and read modify write hazards; critical sections and approaches to protect them including disabling interrupts in embedded contexts and scoped locks. Synchronization primitives and patterns are included: mutexes, binary semaphores, counting semaphores, condition variables, message queues, atomic operations and lock free primitives such as compare and swap. Memory ordering concerns and memory barrier usage on multi core systems are covered, along with priority inversion and priority inheritance. Also addressed are deadlock, livelock, and starvation concepts and avoidance strategies, granularity and performance trade offs of locking, and practical synchronization patterns. Preparation should include identifying and fixing races in code, designing correct concurrent interfaces, and debugging and testing techniques such as stress testing, instrumentation, deterministic replay, race detectors, static analysis, and code review strategies.

HardSystem Design
55 practiced
Design a deterministic concurrency testing and replay framework for embedded firmware that allows controlled scheduling, ISR injection, and replay on a host. Describe the events you must record, the on-target minimal recording mode versus full debug mode, the replay mechanism, and how you ensure low perturbation when recording in-field.
MediumTechnical
49 practiced
A shared 64-bit timestamp counter is read in the main thread but updated in an ISR on a 32-bit microcontroller. Identify the potential atomicity issue and present at least two ways to safely read and update the 64-bit counter without using 64-bit atomic hardware support.
MediumTechnical
64 practiced
Write a simple spinlock implementation in C using atomic compare-and-swap and an exponential backoff strategy for a multi-core embedded system. Your implementation should provide lock and unlock functions and include memory barriers to ensure correct visibility of protected data. Specify which atomic builtins or assembly primitives you use.
EasyTechnical
101 practiced
In bare-metal embedded code (no OS), describe how you should implement a critical section. Explain the technique of disabling interrupts, how to save/restore interrupt mask state, and why nesting support is required. Provide the constraints you would impose (maximum critical section size, function call rules) and why.
HardSystem Design
55 practiced
Design a safe flash update protocol on a dual-core embedded system where bootloader and application can both access configuration areas. Requirements: atomic updates, recovery after power loss, minimal downtime, and safe coordination across cores. Outline data structures, locking, and boot-time recovery steps.

Unlock Full Question Bank

Get access to hundreds of Concurrency and Synchronization interview questions and detailed answers.

Sign in to Continue

Join thousands of developers preparing for their dream job.