Concurrency and Synchronization Questions

Covers the principles and practical techniques for safely coordinating concurrent execution and access to shared resources. Topics include models of concurrency such as threads, processes, interrupt handlers, and tasks in a real time operating system; differences between preemptive and cooperative scheduling; shared data hazards including race conditions and read modify write hazards; critical sections and approaches to protect them including disabling interrupts in embedded contexts and scoped locks. Synchronization primitives and patterns are included: mutexes, binary semaphores, counting semaphores, condition variables, message queues, atomic operations and lock free primitives such as compare and swap. Memory ordering concerns and memory barrier usage on multi core systems are covered, along with priority inversion and priority inheritance. Also addressed are deadlock, livelock, and starvation concepts and avoidance strategies, granularity and performance trade offs of locking, and practical synchronization patterns. Preparation should include identifying and fixing races in code, designing correct concurrent interfaces, and debugging and testing techniques such as stress testing, instrumentation, deterministic replay, race detectors, static analysis, and code review strategies.

HardTechnical

64 practiced

A device driver handles 10k operations per second and contends on one global lock protecting device state. Provide an analysis plan and propose optimizations to improve throughput: consider lock splitting, reader-writer locks, per-channel locks, and lock-free caches. For each option explain trade-offs in implementation cost, memory, and worst-case latency.

EasyTechnical

62 practiced

You need to protect access to a hardware peripheral register that is shared between an ISR and a main task. Which synchronization primitive or pattern would you choose and why? Provide at least two different safe approaches (one minimizing latency, one minimizing implementation complexity) and their trade-offs.

EasyTechnical

61 practiced

Define a race condition and a read-modify-write hazard in the context of embedded firmware. Provide an embedded-specific example (for example: incrementing a peripheral-accessed register or shared variable from both ISR and task) that illustrates a race and explain what can go wrong at run time.

EasyTechnical

66 practiced

Compare and contrast mutex, binary semaphore, and counting semaphore in an embedded RTOS. For each primitive describe ownership semantics, blocking behavior, and whether it is safe to use from an ISR. Give one example use-case for each primitive in a sensor-driven IoT device.

EasyTechnical

50 practiced

Explain the differences between volatile, atomic (C11 stdatomic), and plain reads/writes in embedded concurrency. For each explain what problems it solves and what guarantees it does not provide. Give an example where volatile is necessary and an example where volatile is insufficient.

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